Integrator¶
This block implements an integrator with saturation.
This filter solves some of the limitations of standard Simulink integrator blocks:
When using continuous-time Simulink blocks, the generated code discretizes the continuous-time parameters in each cycle. This is computationally demanding and will increase the input-output delay of the control network. Such an increase in delay may be problematic in performance-critical applications.
When using discrete-time Simulink blocks, the configuration of the filter becomes more difficult. Firstly, control engineers are generally more familiar with continuous-time formulations. Secondly, the discrete-time filter parameters depend on the sample time of the system. When the sample time changes, the response of the filter changes as well.
Implementation¶
The integrator is implemented in discrete-time as shown below.
The filter is discretized assuming a fixed sample rate. That means only fixed-step solvers can be used during simulation. An error will be triggered when attempting to simulate with a variable-step solver.
The Reset
input can be used to reset the state of the integrator.
Hint
When connected to the (inverted) CloseLoopRequest
signal, the Reset
input can be used to guarantee that the integrator output is zero when the control loop is opened.
The Lock
input can be used to disconnect the input from the integrator.
Hint
Locking can be useful when using a control output saturation.
When the control output saturates, the integrator state will keep accumulating, eventually preventing the control output from leaving the saturated state.
This can be prevented by setting the Lock
input to true when saturating the control output.
Parameters and Dialog Box¶
- Show discrete-time parameters in diagnostics view
When checked, the discrete-time parameters of the Integrator block are printed to the diagnostics view. This option only affects the Simulink environment, the discrete-time parameters can always be evaluated in PMP.
- Frequency
Parameter setting the integrator bandwidth. In other words, this sets the frequency for which the integrator gain is one (0 dB).
Hint
Due to the frequency response of an integrator (20 dB/dec magnitude decay), the configuration of the bandwidth resembles the configuration of an integral gain. I.e. doubling the integrator frequency effectively means doubling the integrator gain.
- LowerClip & UpperClip
- Parameter setting the lower and upper bound of the integrator saturation.The saturation limits are ignored when
LowerClip
≥UpperClip
.Note
Whenever saturation becomes active, the
Saturated
output will become true. Otherwise, it will be false.
Data Type Support¶
- Input ports
- The input port
Input
accepts only signals of typesingle
.The input portReset
accepts only signals of typeboolean
.The input portLock
accepts only signals of typeboolean
. - Dialog parameters
All dialog parameters must be of type
single
. Please note, entering double values will give a warning that precision loss may occur.
Code generation¶
- Filter name
The integrator name is inherited from Simulink. To ensure that all integrators have a unique name in PMP, the integrator name is prefixed with the name of its parent subsystems. For example, the name of filter
Integrator1
in Subsystemmodelname/SubsystemFoo/SubsystemBar
becomesSubsystemFoo_SubsystemBar_Integrator1
.- Signals
The following signals are generated in PMP:
¶ Signal Name
Access
Data type
Description
Frequency
RW
Float
Integrator bandwidth.
Ki
R
Float
Integrator anti wind-up lower saturation
LowerClip
RW
Float
Integrator anti wind-up lower saturation.
UpperClip
RW
Float
Integrator anti wind-up upper saturation.